How to Increase Power Density and Simplify Cooling Using Advanced MOSFETs

Technical Overview: Silicon carbide (SiC) MOSFETs enable higher switching frequencies, higher power density, and improved efficiency in electric vehicle (EV) powertrains, artificial intelligence (AI) data server power systems, motor drives, and switched-mode power supplies (SMPSs). This article explains how top-side cooled (TSC) package technology improves thermal management by providing a direct thermal path from the MOSFET die to a heatsink while reducing dependence on pc board thermal vias. It examines switching, conduction, and body diode losses and discusses how drain-source ON resistance (RDS(ON)), thermal resistance, and Kelvin source connections influence efficiency, switching performance, and thermal behavior. Using examples from Nexperia's 1200 volt QDPAK SiC MOSFET portfolio, the article shows how continuous drain current, power dissipation, package architecture, and thermal performance influence device selection for high-power conversion applications. (Overview courtesy of ChatGPT)

High-power, high-voltage applications such as electric vehicle (EV) powertrains, artificial intelligence (AI) data servers, motor drives, and power conversion systems require increasingly high power density. To meet this demand, designers need switching devices that operate efficiently at higher power levels, junction temperatures, and switching frequencies.

These goals can be achieved using metal-oxide semiconductor field-effect transistors (MOSFETs) based on wide-bandgap (WBG) semiconductor materials, such as silicon carbide (SiC). These devices now benefit from packaging enhancements that improve cooling.

This article briefly reviews the challenges facing designers of high-power, high-voltage systems. It then introduces SiC MOSFETs from Nexperia with advanced packaging and shows how they help address these challenges.

Why use SiC for high power density?

High-power-density switched-mode power supplies (SMPSs) and converters require active devices with high voltage and current ratings, tolerance for high-temperature operation, and higher switching speeds.

High-power-density designs benefit greatly from WBG semiconductors, especially SiC devices. These devices operate at higher voltages and occupy less area than silicon (Si) devices with similar power-handling capabilities. They also tolerate higher junction temperatures, reducing cooling requirements.

SiC has a breakdown electric field that is 10 times that of Si, resulting in devices with higher breakdown voltages and smaller dimensions for the same power-handling capability. The higher bandgap in SiC devices also allows them to support higher allowable junction temperatures. In addition, SiC has a higher melting point, which, together with higher thermal conductivity, improves cooling performance and allows operation over an extended temperature range.

The higher saturated electron drift velocity of SiC enables higher potential switching frequencies. Higher switching speed results in lower switching losses. These higher switching frequencies also enable the use of smaller inductors and capacitors, further reducing size and weight.

Power device losses

Internal heating in power devices results from several sources of power loss. These losses arise from both passive and active components; those associated with active devices, such as a MOSFET, include switching, conduction, and body diode losses.

Switching losses occur when drain-to-source voltage (V_DS) and drain current (I_D) are present simultaneously in a device. This happens when the device switches either on or off (Figure 1).

Figure 1: Switching losses occur when V_DS and I_D are non-zero simultaneously during turn-on (left) or turn-off (right). (Image source: Nexperia)

When the device is off, V_DS is high and I_D is near zero. The device turns on by increasing the gate-to-source voltage (V_GS). As the device turns on, I_D increases while V_DS decreases; during this interval, the power dissipated by the device equals V_DS × I_D. This is the turn-on switching loss, and the device must dissipate this power. The loss is expressed as energy, as shown by the variable E_ON (the time integral of V_DS × I_D) in Figure 1. The turn-off loss begins when V_DS is low and I_D is high. As V_GS decreases, the device begins to turn off; I_D decreases to zero while V_DS increases. Again, the loss occurs when both I_D and V_DS are non-zero. The turn-off energy loss (E_off) is shown similarly to the turn-on loss (the time integral of V_DS × I_D).

Because the switching loss per transition is the time integral of V_DS × I_D, faster turn-on and turn-off transitions reduce the energy dissipated during each switching event. The inherently fast switching capability of SiC devices allows them to operate efficiently at higher switching frequencies than comparable Si MOSFETs. Additionally, using a low-inductance package further increases the maximum switching frequency.

While the device is on, current through the channel resistance develops a voltage across the channel; the resulting conduction losses are equal to I_D² × the channel ON resistance (R_DS(ON)). The lower the channel R_DS(ON), the lower the conduction loss.

Body diode losses arise from the discharge of stored charge in the MOSFET’s body diode during switching. Designers therefore need MOSFETs that have robust body diodes and fast recovery characteristics that minimize these losses, even as temperatures rise.

Packaging to improve SiC temperature range

To address the challenges of high-power-density design, Nexperia developed a line of SiC MOSFETs featuring a top-side cooling (TSC) package architecture (Figure 2, top). Compared with bottom-side cooling (BSC) (Figure 2, bottom), TSC offers several advantages.

Figure 2: Shown is a comparison of TSC and BSC packaging. (Image source: Art Pini)

BSC connects the heatsink or cold plate to the bottom of the printed circuit board (pc board) beneath the device being cooled. The thermal path to the device is indirect and relies on thermal vias, which are holes in the pc board that may be filled with a metal, usually copper, to conduct heat through the board. The heatsink is not directly connected to the device but relies on the thermal vias for heat transfer. The thermal interface material provides close thermal coupling while maintaining electrical isolation.

Alternatively, TSC provides direct thermal contact between the device being cooled and the heatsink or cold plate. The heatsink is connected to the device via an integral metal plate, with a thermal interface material that provides electrical isolation while maintaining thermal connectivity. This direct connection lowers thermal impedance, resulting in more efficient cooling. This is especially beneficial for SiC devices; their higher power density and junction-temperature capability make thermal resistance more critical.

Another advantage of TSC is that it frees up the bottom side of the pc board, allowing other circuitry, such as gate-drive electronics, to be placed closer to the device.

Practical TSC MOSFET implementations

Nexperia’s QDPAK (SOT8114-1) devices (Figure 3) use TSC architecture. They are rated for 1,200 V and are designed for high efficiency, high power density, and robust thermal performance in automotive and industrial power conversion systems.

Figure 3: Shown are the pin assignments, outline drawing, schematic symbol, and a view of the QDPAK package of the enclosed MOSFET. (Image source: Nexperia)

The QDPAK MOSFETs are enclosed in a plastic surface-mount device (SMD) package with a metallic heatsink on the top face. The heatsink is internally connected to the MOSFET's drain terminal for TSC. The package measures 15.0 mm × 15.4 mm × 2.3 mm, and the 22 pins are spaced at a 1.14 mm pitch.

Note the Kelvin connection at the source terminal. If the gate drive is applied between the gate and the external source terminals (Figure 4, left), the varying I_D generates a voltage across the source-lead inductance, which can be substantial at high current levels. This voltage is in series with the gate-drive voltage and introduces unwanted feedback during switching.

The Kelvin connection (Figure 4, right) links internally to the source, bypassing the source-lead inductance. The gate drive is applied between this Kelvin connection and the gate, thereby bypassing the voltage variation across the device's internal series inductance, reducing unwanted feedback in the power circuit's control loop and lowering switching losses.

Figure 4: The Kelvin connection (right) prevents the voltage across the source-lead inductance from adding to the gate-drive voltage. (Image source: Art Pini)

All Nexperia QDPAK devices are N-channel MOSFETs that differ in maximum power dissipation, maximum continuous current rating, and R_DS(ON).

For example, the NSF040120T1A1HP can handle up to 50 amperes (A) of continuous I_D and dissipate up to 217 watts. At an I_D of 30 A and an 18 V gate voltage, the typical R_DS(ON) is 40 milliohms (mΩ), with a maximum of 60 mΩ.

The NSF030120T1A0HP dissipates up to 313 watts with a maximum I_D of 68 A. At an I_D of 40 A and an 18 V gate voltage, it has a lower typical R_DS(ON) of 30 mΩ; the maximum is 45 mΩ.

The NSF060120T1A0HP can handle up to 152 watts and a maximum I_D of 33 A. At 20 A and the same 18 V gate voltage, it has a typical R_DS(ON) of 60 mΩ and a maximum of 90 mΩ.

The final example is the NSF017120T1A0HP, which can handle 469 watts of power dissipation with a maximum I_D of 111 A. At 71 A and an 18 V gate voltage, it has a typical R_DS(ON) of 17 mΩ; 26 mΩ maximum.

Product selection is based primarily on power-level requirements, which are intended to match the current needed for a particular application.

Conclusion

Designers of automotive, AI, motor drives, and power conversion systems need to account for increasingly high power density. The Nexperia 1,200 V QDPAK SiC MOSFETs combine fast switching performance with a direct die-to-heatsink TSC package architecture, enabling high efficiency, power density, and thermal performance in these challenging applications.