Avoid this trap when using LDOs!
Power Supplies Voltage Regulators
Before you read
This blog assumes a basic knowledge of power supply architectures - namely linear and switching regulators. Basic definitions will be given, but I highly suggest you read into them a little bit in order to understand the motivation for this blog post.
This article by Art Pini is a great intro to LDOs! Read it!
First, what is an LDO?
When people say "LDO," they are usually referring to low-dropout regulators, which are a type of linear regulator. At its simplest, a linear regulator is no more than a resistor that changes its resistance in such a way as to make the output voltage what we want it to be. As for what makes an LDO not just a simple linear regulator, it has to do with how the pass element is used - again, I suggest reading the article I linked above.
Anyways, this is usually implemented with a "pass element" - some kind of transistor that acts as the adjustable resistor and an op-amp circuit that uses negative feedback to drive the transistor in order to change its resistance such that the desired output voltage is attained.
Since all we're doing is changing a resistance, there is ideally no noise inherent to this architecture. However, this architecture is bad news for efficiency, as the pass element dissipates a lot of energy as heat - like any resistive solution. You can think of it as a very smart resistor divider formed between the pass element and your load.
That is unlike, however, the switch-mode power supply, which, as the name implies, uses switching action to step voltage down or up, which inherently will always leave some amount of voltage ripple. However, since they are purely switching, they are (ideally) 100% efficient.
So, the super-simplified model that many people use is "switching = efficient but noisy", and "linear = inefficient but quiet".
An example

For example, if you wanted to power a 1.8V FPGA / microcontroller rail from 12V, you might use a switching supply to take the 12V down to maybe 2.5V and then use an LDO to turn the 2.5V into 1.8V. Another use case would be powering precision circuits with a large step-down ratio.
Regardless, we can't just step down directly with the LDO, as the efficiency will be quite poor, at 15%, which we get by dividing the input voltage by the output voltage (only true for a series pass element-based PSU, like the LDO).
If we only used a switcher, we would have good efficiency, but we would be more prone to having issues with the rail being noisy / unclean with all the ripple and switching noise.
So, a really common thing that people try to do is use a switcher to efficiently step down most of the voltage and then do the rest with the LDO to get a silent output voltage. Ideally, this works pretty well, but unless you do your research, you can't have your cake and eat it too.
Enter: PSRR

We can see that near DC, we have -60 dB of ripple rejection, which corresponds to a reduction of 1000x. So, if we had 100 mV of ripple @ 100 Hz, it would become 100 microvolts! Cool!
However, at our actual frequency of 1 MHz, we have an (comparatively) abysmal -20 dB, a reduction of 10x. Thus, we would have 10 mV of ripple on the output -- which may be a problem depending on the application.
What can we do?
I would start by defining just how much ripple we can tolerate from our requirements. Then, see if we can change the design of our buck converter to accommodate that ripple. However, it's not just about ripple. There's switching / common mode noise, general EMI, etc., that can be an issue. So, if requirements dictate it, we have to go out and find a fancier LDO.
Let's pick the TPS7A470x, an LDO designed for RF applications. Looking at the datasheet:

First, we can see that frequency isn't the sole thing that impacts PSRR, but more importantly, we can see that for this part (provided we are using 5V out), we have a nice -60 dB at our switching frequency and even higher rejection past that. Very nice!
Conclusion
Using an LDO after a switching stage is a good way to get the best of both worlds: efficient conversion and quiet voltage output! However, we need to make sure that the LDO has enough PSRR at the frequencies of interest in order to squash the switching noise generated by the SMPS as well as other switchy things on the board / common-mode noise.

